Dieses Buch beschreibt einen umfassenden Ansatz für die Synthese und Optimierung von Logic-in-Memory-Computing-Hardware und -Architekturen mit memristiven Bauelementen, der eine solide Grundlage für praktische Anwendungen schafft.  Die Leser werden mit einer neuen Generation von Computerarchitekturen vertraut gemacht, die potenziell schneller arbeiten können, da die Notwendigkeit der Kommunikation zwischen Prozessor und Speicher überwunden wird.  Die Diskussion umfasst verschiedene Synthesemethoden und Optimierungsalgorithmen, die auf Implementierungskostenmetriken wie Latenzzeit und Flächen abzielen, sowie das Problem der Zuverlässigkeit, das durch die kurze Lebensdauer des Speichers verursacht wird. Präsentiert einen umfassenden Synthesefluss für das aufkommende Feld des Logic-in-Memory-Computings; Beschreibt die automatische Kompilierung von programmierbaren Logik-in-Memory-Computerarchitekturen; Enthält mehrere effektive Optimierungsalgorithmen, die auch auf die klassische Logiksynthese anwendbar sind; Untersucht den unausgewogenen Schreibverkehr in Logic-in-Memory-Architekturen und beschreibt Ansätze zum Verschleißausgleich, um diesen zu verringern.

This book presents exact, that is minimal, solutions to individual steps in the design process for Digital Microfluidic Biochips (DMFBs), as well as a one-pass approach that combines all these steps in a single process. All of the approaches discussed are based on a formal model that can easily be extended to cope with further design problems. In addition to the exact methods, heuristic approaches are provided and the complexity classes of various design problems are determined. Presents exact methods to tackle a variety of design problems for Digital Microfluidic Biochips (DMFBs); Describes an holistic, one-pass approach solving different design steps all at once; Based on a formal model of DMFBs that is easily adaptable to deal with further design tasks.

This book describes recent findings in the domain of Boolean logic and Boolean algebra, covering application domains in circuit and system design, but also basic research in mathematics and theoretical computer science.  Content includes invited chapters and a selection of the best papers presented at the 15th annual International Workshop on Boolean Problems.

Dieses Buch beschreibt eine Reihe von SystemC-basierten Analysemethoden für virtuelle Prototypen, einschließlich Entwurfsverständnis, Verifikation, Sicherheitsvalidierung und Entwurfsraumuntersuchung.  Der Leser erhält einen Überblick über die neuesten Forschungsergebnisse auf dem Gebiet der Electronic Design Automation (EDA) auf der elektronischen Systemebene (ESL). Die besprochenen Methoden ermöglichen es den Lesern, wichtige Aufgaben und Anwendungen im Entwurfsprozess leicht zu bewältigen. Übersetzt mit www.DeepL.com/Translator (kostenlose Version)

This book describes recent findings in the domain of Boolean logic and Boolean algebra, covering application domains in circuit and system design, but also basic research in mathematics and theoretical computer science. Content includes invited chapters and a selection of the best papers presented at the 14th annual International Workshop on Boolean Problems.

This book describes recent findings in the domain of Boolean logic and Boolean algebra, covering application domains in circuit and system design, but also basic research in mathematics and theoretical computer science. Content includes invited chapters and a selection of the best papers presented at the 14th annual International Workshop on Boolean Problems.

This book examines some of the underlying processes behind different forms of information management, including how we store information in our brains, the impact of new technologies such as computers and robots on our efficiency in storing information, and how information is stored in families and in society. The editors brought together experts from a variety of disciplines. While it is generally agreed that information reduces uncertainties and that the ability to store it safely is of vital importance, these authors are open to different meanings of "information": computer science considers the bit as the information block; neuroscience emphasizes the importance of information as sensory inputs that are processed and transformed in the brain; theories in psychology focus more on individual learning and on the acquisition of knowledge; and finally sociology looks at how interpersonal processes within groups or society itself come to the fore. The book will be of value to researchers and students in the areas of information theory, artificial intelligence, and computational neuroscience.

This book describes recent findings in the domain of Boolean logic and Boolean algebra, covering application domains in circuit and system design, but also basic research in mathematics and theoretical computer science. Content includes invited chapters and a selection of the best papers presented at the 13th annual International Workshop on Boolean Problems. Provides a single-source reference to the state-of-the-art research in the field of logic synthesis and Boolean techniques; Includes a selection of the best papers presented at the 13th annual International Workshop on Boolean Problems; Covers Boolean algebras, Boolean logic, Boolean modeling, Combinatorial Search, Boolean and bitwise arithmetic, Software and tools for the solution of Boolean problems, Applications of Boolean logic and algebras, Applications to real-world problems, Boolean constraint solving, and Extensions of Boolean logic.

This book introduces several novel approaches to pave the way for the next generation of integrated circuits, which can be successfully and reliably integrated, even in safety-critical applications. The authors describe new measures to address the rising challenges in the field of design for testability, debug, and reliability, as strictly required for state-of-the-art circuit designs. In particular, this book combines formal techniques, such as the Satisfiability (SAT) problem and the Bounded Model Checking (BMC), to address the arising challenges concerning the increase in test data volume, as well as test application time and the required reliability. All methods are discussed in detail and evaluated extensively, while considering industry-relevant benchmark candidates. All measures have been integrated into a common framework, which implements standardized software/hardware interfaces.

This book describes approaches for integrating more automation to the early stages of EDA design flows. Readers will learn how natural language processing techniques can be utilized during early design stages, in order to automate the requirements engineering process and the translation of natural language specifications into formal descriptions. This book brings together leading experts to explain the state-of-the-art in natural language processing, enabling designers to integrate these techniques into algorithms, through existing frameworks.

This book presents a comprehensive set of techniques that enhance all key aspects of a modern Virtual Prototype (VP)-based design flow. The authors emphasize automated formal verification methods, as well as advanced coverage-guided analysis and testing techniques, tailored for SystemC-based VPs and also the associated Software (SW). Coverage also includes VP modeling techniques that handle functional as well as non-functional aspects and also describes correspondence analyses between the Hardware- and VP-level to utilize information available at different levels of abstraction. All approaches are discussed in detail and are evaluated extensively, using several experiments to demonstrate their effectiveness in enhancing the VP-based design flow. Furthermore, the book puts a particular focus on the modern RISC-V ISA, with several case-studies covering modeling as well as VP and SW verification aspects.

This book describes a set of SystemC-based virtual prototype analysis methodologies, including design understanding, verification, security validation, and design space exploration. Readers will gain an overview of the latest research results in the field of Electronic Design Automation (EDA) at the Electronic System Level (ESL). The methodologies discussed enable readers to tackle easily key tasks and applications in the design process.

This book describes a comprehensive approach for synthesis and optimization of logic-in-memory computing hardware and architectures using memristive devices, which creates a firm foundation for practical applications. Readers will get familiar with a new generation of computer architectures that potentially can perform faster, as the necessity for communication between the processor and memory is surpassed. The discussion includes various synthesis methodologies and optimization algorithms targeting implementation cost metrics including latency and area overhead as well as the reliability issue caused by short memory lifetime. Presents a comprehensive synthesis flow for the emerging field of logic-in-memory computing; Describes automated compilation of programmable logic-in-memory computer architectures; Includes several effective optimization algorithm also applicable to classical logic synthesis; Investigates unbalanced write traffic in logic-in-memory architectures and describes wear leveling approaches to alleviate it.

This book examines some of the underlying processes behind different forms of information management, including how we store information in our brains, the impact of new technologies such as computers and robots on our efficiency in storing information, and how information is stored in families and in society. The editors brought together experts from a variety of disciplines. While it is generally agreed that information reduces uncertainties and that the ability to store it safely is of vital importance, these authors are open to different meanings of "information": computer science considers the bit as the information block; neuroscience emphasizes the importance of information as sensory inputs that are processed and transformed in the brain; theories in psychology focus more on individual learning and on the acquisition of knowledge; and finally sociology looks at how interpersonal processes within groups or society itself come to the fore. The book will be of value to researchers and students in the areas of information theory, artificial intelligence, and computational neuroscience.

This book provides a comprehensive discussion of UML/OCL methods and design flow, for automatic validation and verification of hardware and software systems. While the presented flow focuses on using satisfiability solvers, the authors also describe how these methods can be used for any other automatic reasoning engine. Additionally, the design flow described is applied to a broad variety of validation and verification tasks. The authors also cover briefly how non-functional properties such as timing constraints can be handled with the described flow.

This book describes recent findings in the domain of Boolean logic and Boolean algebra, covering application domains in circuit and system design, but also basic research in mathematics and theoretical computer science. Content includes invited chapters and a selection of the best papers presented at the 13th annual International Workshop on Boolean Problems. Provides a single-source reference to the state-of-the-art research in the field of logic synthesis and Boolean techniques; Includes a selection of the best papers presented at the 13th annual International Workshop on Boolean Problems; Covers Boolean algebras, Boolean logic, Boolean modeling, Combinatorial Search, Boolean and bitwise arithmetic, Software and tools for the solution of Boolean problems, Applications of Boolean logic and algebras, Applications to real-world problems, Boolean constraint solving, and Extensions of Boolean logic.

This book describes a comprehensive approach for synthesis and optimization of logic-in-memory computing hardware and architectures using memristive devices, which creates a firm foundation for practical applications. Readers will get familiar with a new generation of computer architectures that potentially can perform faster, as the necessity for communication between the processor and memory is surpassed. The discussion includes various synthesis methodologies and optimization algorithms targeting implementation cost metrics including latency and area overhead as well as the reliability issue caused by short memory lifetime. Presents a comprehensive synthesis flow for the emerging field of logic-in-memory computing; Describes automated compilation of programmable logic-in-memory computer architectures; Includes several effective optimization algorithm also applicable to classical logic synthesis; Investigates unbalanced write traffic in logic-in-memory architectures and describes wear leveling approaches to alleviate it.

This book provides readers with a comprehensive introduction to the formal verification of hardware and software. World-leading experts from the domain of formal proof techniques show the latest developments starting from electronic system level (ESL) descriptions down to the register transfer level (RTL). The authors demonstrate at different abstraction layers how formal methods can help to ensure functional correctness. Coverage includes the latest academic research results, as well as descriptions of industrial tools and case studies.

This book presents a new optimization flow for quantum circuits realization. At the reversible level, optimization algorithms are presented to reduce the quantum cost. Then, new mapping approaches to decompose reversible circuits to quantum circuits using different quantum libraries are described. Finally, optimization techniques to reduce the quantum cost or the delay are applied to the resulting quantum circuits. Furthermore, this book studies the complexity of reversible circuits and quantum circuits from a theoretical perspective.

This book brings together a selection of the best papers from the eighteenth edition of the Forum on specification and Design Languages Conference (FDL), which took place on September 14-16, 2015, in Barcelona, Spain. FDL is a well-established international forum devoted to dissemination of research results, practical experiences and new ideas in the application of specification, design and verification languages to the design, modeling and verification of integrated circuits, complex hardware/software embedded systems, and mixed-technology systems.

This book provides a comprehensive discussion of UML/OCL methods and design flow, for automatic validation and verification of hardware and software systems. While the presented flow focuses on using satisfiability solvers, the authors also describe how these methods can be used for any other automatic reasoning engine. Additionally, the design flow described is applied to a broad variety of validation and verification tasks. The authors also cover briefly how non-functional properties such as timing constraints can be handled with the described flow.

This book provides a single-source reference to the state-of-the-art in logic synthesis. Readers will benefit from the authors' expert perspectives on new technologies and logic synthesis, new data structures, big data and logic synthesis, and convergent logic synthesis. The authors describe techniques that will enable readers to take advantage of recent advances in big data techniques and frameworks in order to have better logic synthesis algorithms.

This book introduces a new level of abstraction that closes the gap between the textual specification of embedded systems and the executable model at the Electronic System Level (ESL). Readers will be enabled to operate at this new, Formal Specification Level (FSL), using models which not only allow significant verification tasks in this early stage of the design flow, but also can be extracted semi-automatically from the textual specification in an interactive manner. The authors explain how to use these verification tasks to check conceptual properties, e.g. whether requirements are in conflict, as well as dynamic behavior, in terms of execution traces.

This book provides readers with a comprehensive introduction to the formal verification of hardware and software. World-leading experts from the domain of formal proof techniques show the latest developments starting from electronic system level (ESL) descriptions down to the register transfer level (RTL). The authors demonstrate at different abstraction layers how formal methods can help to ensure functional correctness. Coverage includes the latest academic research results, as well as descriptions of industrial tools and case studies.

This book provides a comprehensive overview of automatic model refinement, which helps readers close the gap between initial textual specification and its desired implementation. The authors enable readers to follow two "directions" for refinement: Vertical refinement, for adding detail and precision to single description for a given model and Horizontal refinement, which considers several views on one level of abstraction, refining the system specification by dedicated descriptions for structure or behavior. The discussion includes several methods which support designers of electronic systems in this refinement process, including verification methods to check automatically whether a refinement has been conducted as intended.